PCI Express Terms and Acronyms (Seven)

Message Signaled
Interrupt (MSI/MSI-X) Two similar but separate mechanisms that enable a Function to request service
by writing a system-specified DWORD of data to a system-specified address
using a Memory Write Request. Compared to MSI, MSI-X supports a larger
maximum number of vectors and independent message address and data for
each vector.
Message Space One of the four address spaces of the PCI Express architecture.
Multicast, MC A feature and associated mechanisms that enable a single Posted Request TLP
sent by a source to be distributed to multiple targets.
Multicast Group, MCG A set of Endpoints that are the target of Multicast TLPs in a particular address
range.
Multicast Hit The determination by a Receiver that a TLP will be handled as a Multicast TLP.
Multicast TLP A TLP that is potentially distributed to multiple targets, as controlled by Multicast
Capability structures in the components through which the TLP travels.
Multicast Window A region of Memory Space where Posted Request TLPs that target it will be
handled as Multicast TLPs.
naturally aligned A data payload with a starting address equal to an integer multiple of a power of
two, usually a specific power of two. For example, 64-byte naturally aligned
means the least significant 6 bits of the byte address are 00 0000b.
P2P Peer-to-peer.
Packet A fundamental unit of information transfer consisting of a header that, in some
cases, is followed by a data payload.
PCI bus The PCI Local Bus, as specified in the PCI Local Bus Specification, Revision 3.0
and the PCI-X Addendum to the PCI Local Bus Specification, Revision 2.0.
PCI Software Model The software model necessary to initialize, discover, configure, and use a PCI
device, as specified in the PCI Local Bus Specification, Revision 3.0, the PCI-X
Addendum to the PCI Local Bus Specification, Revision 2.0, and the PCI BIOS
Specification.
Phantom Function
Number, PFN An unclaimed Function Number that may be used to expand the number of
outstanding transaction identifiers by logically combining the PFN with the Tag
identifier to create a unique transaction identifier.
Physical Lane See Lane.
Physical Layer The Layer that directly interacts with the communication medium between two
components.
Port 1. Logically, an interface between a component and a PCI Express Link. 2.
Physically, a group of Transmitters and Receivers located on the same chip that
define a Link.
ppm Parts per Million. Applied to frequency, the difference, in millionths of a Hertz,
between a stated ideal frequency, and the measured long-term average of a
frequency.
Quality of Service,
QoS Attributes affecting the bandwidth, latency, jitter, relative priority, etc., for
differentiated classes of traffic.